A charge pump is a kind of DC to DC converter that uses capacitors as energy-storage elements to create either a higher- or lower-voltage power source.
In some cases, a high voltage is generated from an external power supply which can vary between a low value, for example 1.55 volts and a high value, for example 3.6 volts. As a result, charge pump circuits are dimensioned to have the capacity to generate high voltage from the lowest value of the supply voltage.
Yet, this has consequences for the undulations of the regulated voltage obtained from high values of the supply voltage.
Indeed, it is then necessary to have regulations functioning at extremely high speed in order to ensure reasonable undulations of the level of high voltage delivered by the charge pump circuit from a high supply voltage value, while ensuring a minimum static consumption.
Yet, the conventional structures of charge pump control circuits do not allow for both rapid regulation (in order to minimize the undulations of the regulated voltage at the output of the charge pump) and a low consumption.
This is the case, for example, for the type of architecture of a device for controlling a charge pump circuit illustrated in FIG. 1.
More precisely, in this architecture of the prior art, the output voltage Vpump delivered by the charge pump circuit is looped back to an input of a logic gate 2 (typically an AND gate) via a voltage divider bridge 6 and a static comparator 7 which compares the voltage Vpump/K with a reference voltage VREF. The output signal of the comparator STOPPH is combined in the logic gate 2, with a clock signal Clock delivered by an oscillator 1. The output signal of the AND gate 2, referenced GCLK, is then shaped in a conventional shaping circuit 3 in order to deliver the control signal PUMPH of the charge pump circuit 4.
In such an architecture, the regulation is based on the path between the regulating signal STOPPH and the clock signal Clock. Furthermore, the regulation must be quick in order to avoid delays in the regulating loop which could cause spikes on the output voltage Vpump.
Yet, the comparator 7 is, in this case, a static comparator, in that it continuously carries out the comparison between the voltage Vpump/K and the reference voltage VREF.
Yet, high-speed comparators are not compatible with low consumption requirements.